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EMB05N10HS Datasheet

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Excelliance MOS · EMB05N10HS File Size : 512.42KB · 9 hits

Features and Benefits

bient3 RθJA 1Pulse width limited by maximum junction temperature. 2Duty cycle < 1% 350°C / W when mounted on a 1 in2 pad of 2 oz copper. 4Guarantee by Engineering test TYPICAL 2020/9/2 A.0 EMB05N10HS LIMITS ±20 122 77 16 13 196 36 64.8 32.4 138.9 55.6 2.5 1.6 -55 to 150 UNIT V A mJ W W °C .

EMB05N10HS EMB05N10HS EMB05N10HS
TAGS
Single
N-Channel
Logic
Level
Enhancement
Mode
Field
Effect
Transistor
EMB05N10H
EMB05N10HS
EMB05N03GH
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